This application note describes how to program the Flash of SPC56x devices through the Nexus/JTAG protocol.
This document details the use of the Nexus debug interface to program the internal Flash memory of the SPC56x microcontroller family using the JTAG communication protocol. It covers the JTAG signals, TAP controller state machine, and the JTAG controller architecture.
| Supported Product Families | SPC563Mxx, SPC564Axx, SPC560Dxx, SPC560Bxx, SPC560Cxx, SPC560Pxx, SPC56ELxx |
|---|---|
| JTAG Standard Compliance | IEEE 1149.1-2001 |
The supported products include the SPC563Mxx, SPC564Axx, SPC560Dxx, SPC560Bxx, SPC560Cxx, SPC560Pxx, and SPC56ELxx families.
The JCOMP pin assertion allows the JTAGC to be put into a reset state.