AN4057 is ST's application note about SPC560Pxx/SPC56APxx microcontrollers power on HW guideline. The application note gives design references to ensure a reliable microcontroller power up sequence also in the condition of an offset voltage on the high voltage regulator supply pin VDD_HV_REG at power up.
This document addresses system hardware designers using STMicroelectronics SPC560Pxx/SPC56APxx microcontrollers, offering design references to ensure a reliable power-up sequence even when an offset voltage exists on the high-voltage regulator supply pin (Vpp_Hv_REG). It specifically covers scenarios where internal voltage regulators are used and requires adherence to specific design ballasts and supporting networks.
The note details potential fault conditions that may induce an offset voltage, such as shorted supplies or battery shorts to board connectors. To mitigate these issues and prevent the microcontroller from remaining in reset, it proposes hardware solutions including resistive partitioning networks between supply pins and active discharge paths to ground for the Vpp_Hv_REG pin.
| Affected Microcontroller Families | SPC560Pxx, SPC56APxx |
|---|---|
| Document ID | Doc ID 022842 Rev 1 |
Offset voltages can be induced by GPIO configurations where signals are powered while the microcontroller is off, or by a battery short to any pin of the board connector.
An offset voltage before a correct supply sequence can set the Power-On Reset (POR) device logic to an undefined state, preventing internal logic from switching correctly and initializing the circuitry.