ST AN2484 handbook

This application note describes how to configure the STMicroelectronics STOTG04 USB OTG transceiver for low power mode. This mode can reduce the transceiver's power consumption to 1 μA, and can disable its functionality when not needed.


ST AN2484 handbook - cover page
Brand
STMicroelectronics
Document type
Application Note
Language
English
Pages
10
File format
PDF
File size
674 KB
Published
06 August, 2012
Updated
30 September, 2023
Model
STOTG04
MD5 checksum
49E7059E718148425BE6A45C97480043

About this manual

The document describes the STOTG04, a low-speed/full-speed USB OTG transceiver that integrates a charge pump and ID line detector. It focuses on reducing current draw by configuring internal registers for power-down operation.

Key topics include the conditions required to enter power-down mode (suspend bit and pin), specific register settings to minimize consumption (such as disabling UART mode or pull-up resistors), and warnings regarding driver biasing control in receive mode that may cause USB compliance test failures.

What's inside

  • STOTG04 Description
  • Power-down Mode
  • Driver Biasing Control
  • Internal Control Registers
  • Revision History

Frequently asked questions

How is power-down mode entered in the STOTG04?

Power-down mode is entered when both the suspend bit in control register 1 and the suspend pin are set.

Which register setting enables UART mode?

UART mode is enabled by setting bit 6 (uart_en) in control register 1.

What causes USB compliance test failures related to driver biasing?

Failures occur if data is sent too early after the output enable signal goes low, causing a longer first bit that misaligns with reference points.

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