This document introduces a method of implementing software data overlays for the ADSP-21161 DSP chip using the EZ-KIT Lite development tool.
This document is an Engineer-to-Engineer Note (EE-151) that explains the concept of software data overlays for the ADSP-21161 Digital Signal Processor. It details how to efficiently manage system memory by swapping data buffers between internal scratchpad memory and external SDRAM or Flash memory, allowing the DSP core to execute other tasks while data transfers occur in the background via the I/O processor.
The text provides a high-level overview of the data overlay technique, comparing the tradeoffs between using SDRAM and Boot Flash for data storage. It also outlines the system design requirements and references specific assembly and C code examples for implementing these overlays using the VisualDSP++ 2.0 development environment and the ADDX-21161-EZ-LITE evaluation board.
A soft data overlay automates the process of reusing a small section of internal memory efficiently by swapping data buffers to and from external memory.
The SDRAM controller can sustain a throughput of 100 MHz for consecutive reads and writes to the same page in SDRAM.
The note discusses a technique using Analog Devices' Visual DSP++ 2.0 tools and its code overlay support to implement data overlays.