This document describes the technical details and functionality issues of the ADuC7033 integrated precision battery sensor.
The document serves as an anomaly list for the ADuC7033 chip, detailing specific issues found in silicon revisions 8L/88 (A60) and BSTZ-88. It covers functionality issues such as LIN communication resets at high voltages, power-on reset failures under specific ramp conditions, and ADC overrange behavior.
Additionally, the text addresses performance issues including reduced ESD ratings for certain silicon batches and a latch-up failure on the WU pin that fails AECQ100 specifications. The document provides recommended workarounds or containment measures where available.
| HBM ESD rating (intended) | 2 kV |
|---|---|
| FICDM ESD rating (intended) | 500 V |
| Power-on reset hold time | 20 ms typically |
The document states that a workaround is pending.
Analog Devices recommends ensuring the VDD supply ramp rate is guaranteed to be greater than 100 us under all conditions.
It is recommended to use a protection diode, such as a BAS52, on the WU pin.