The SHARC Processor ADSP-21060/ADSP-21060L/ADSP-21062/ADSP-21062L/ADSP-21060C/ADSP-21060LC Rev. G is a high-performance signal processor that is ideal for communications, graphics, and imaging applications. It features a Super Harvard Architecture with four independent buses for dual data fetch, instruction fetch, and nonintrusive I/O. The processor also features 32-bit IEEE floating-point computation units, dual-ported on-chip SRAM, and integrated I/O peripherals, making it a complete system-on-a-chip. Additionally, the processor supports multiprocessing features and is packaged in a 240-lead thermally enhanced MQFP_PQ4 package, a 225-ball plastic ball grid array (PBGA) package, and a 240-lead hermetic CQFP package, all of which comply with RoHS standards.