ATC AM24LC08 handbook

Update: 01 October, 2023

Anachip's AM24LC08 is a non-volatile, 8192-bit serial EEPROM that conforms to all I2C 2 wire protocol specifications. The AM24LC08 communication protocol uses CLOCK(SCL) and DATA I/O(SDA) lines to synchronously clock data between the master (for example a microcomputer)and the slave EEPROM devices(s) .In addition, the bus structure allows for a maximum of 8 devices to be connected to the bus. The AM24LC08 has a 16-byte page write mode to minimize the total write time per word. The AM24LC08 has a self-timed write cycle (including auto-erase). The AM24LC08 has a 40-year data retention period, a minimum of 1M write/erase cycles per word, unlimited read cycles, ESD protection and low standby current. The AM24LC08 is available in PDIP-8L and SOP-8L packages.


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Publication date: 01 August, 2012

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PDF Link: ATC AM24LC08 handbook PDF

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