The M34C02 is a 2 Kbit serial EEPROM memory able to lock permanently the data in its first half (from location 00h to 7Fh). This facility has been designed specifically for use in DRAM DIMMs (dual interline memory modules) with Serial Presence Detect. All the information concerning the DRAM module configuration (such as its access speed, its size, its organization) can be kept write protected in the first half of the memory. This bottom half of the memory area can be write-protected using a specially designed software write protection mechanism.
The document describes the M34C02, a 2 Kbit (256x8 bits) electrically erasable programmable read-only memory (EEPROM). It is specifically designed for use in DRAM DIMMs with Serial Presence Detect to store module configuration data. The device features software write protection for its lower 128 bytes and hardware write control for the entire memory area.
The M34C02 operates using a two-wire I²C serial interface supporting up to 400 kHz protocols. It supports single supply voltages ranging from 2.5V to 5.5V (or 2.2V to 5.5V for the low-voltage variant M34C02-L). Key features include a minimum of one million erase/write cycles, 40-year data retention, and protection against power-on reset issues.
| Memory Capacity | 2 Kbit (256x8 bits) |
|---|---|
| Operating Temperature Range | -40 to +85 °C |
| Storage Temperature Range | -65 to +150 °C |
| Supply Voltage (Standard) | 2.5V to 5.5V |
| Supply Voltage (Low Voltage) | 2.2V to 5.5V |
| Data Retention | 40 years (minimum) |
| Endurance | 1 million Erase/Write Cycles (minimum) |
| Interface Protocol | I²C Bus |
| Maximum Clock Frequency | 400 kHz |
It is designed specifically for use in DRAM DIMMs with Serial Presence Detect to store module configuration data.
The first half of the memory (locations 00h to 7Fh) can be locked permanently using a software write protection mechanism.
Yes, by tying the Write Control (WC) input to Vcc, the entire memory area can be write-protected.
The device guarantees a minimum of one million erase/write cycles.