MITSUBISHI M2V64S20DTP-6 -6L -7 -7L -8 -8L/M2V64S30DTP-6 -6L -7 -7L -8 -8L/M2V64S40DTP-6 -6L -7 -7L -8 -8L handbook

M2V64S20DTP-6,-6L,-7,-7L,-8,-8L is a synchronous DRAM produced by Mitsubishi Electric, with a maximum clock frequency of up to 133MHz


MITSUBISHI M2V64S20DTP-6 -6L -7 -7L -8 -8L/M2V64S30DTP-6 -6L -7 -7L -8 -8L/M2V64S40DTP-6 -6L -7 -7L -8 -8L handbook - cover page
Brand
Mitsubishi
Category
Memory
Document type
Datasheet
Language
English
Pages
51
File format
PDF
File size
425 KB
Published
11 June, 2012
Updated
30 September, 2023
MD5 checksum
45CA4C665A50C0148D8DD51CAFC82B84

About this manual

This document is a preliminary datasheet for the Mitsubishi Electric M2V64S20DTP, M2V64S30DTP, and M2V64S40DTP synchronous DRAMs. The devices are available in -6, -7, and -8 speed grades with clock frequencies up to 133MHz for the fastest grade. They feature a 4-bank architecture, LVTTL interface, and support burst lengths of 1, 2, 4, 8, or full page.

What's inside

  • Description
  • Features
  • Pin Configuration
  • Block Diagram
  • Type Designation Code
  • Pin Function
  • Basic Functions
  • Command Truth Table

Specifications

Clock Cycle Time (Min.) -67.5ns
Max. Clock frequency -6133MHz
Power Supply VoltageSingle 3.3v+0.3V
Package TypeTSOP ID with 0.8mm lead pitch
Refresh Cycles4096 refresh cycles every 64ms

Frequently asked questions

What is the maximum clock frequency for the -6 speed grade?

The device supports a maximum clock frequency of 133MHz.

How many refresh cycles are required every 64ms?

The memory requires 4096 refresh cycles every 64ms.

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