Western Digital WD1100-07 Host Interface Logic Datasheet

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Western Digital WD1100-07 Host Interface Logic Datasheet - cover page
Brand
Western
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
4
File format
PDF
File size
125 KB
Published
11 June, 2012
Updated
01 October, 2023
MD5 checksum
B32DA03BE6AA895EA2D719C357252ACB

About this manual

The WD1100-07 is a Host Interface Logic chip designed to simplify the design of Winchester Hard Disk Controllers using the WD1100 chip series. Implemented in NMOS silicon gate technology, it is available in a 20-pin plastic or ceramic Dual-in-Line package. The chip performs logic functions such as timing clock generation, index propagation, and ECC architecture support that would otherwise require discrete logic components.

What's inside

  • FEATURES
  • PIN CONNECTIONS
  • BLOCK DIAGRAM
  • DEVICE DESCRIPTION
  • Control Logic
  • Timing Clock
  • Index Pulse
  • Read Byte Sync
  • Read Clock Pulse
  • Address Mark Delayed Output

Specifications

Package Type20-pin plastic or ceramic Dual-in-Line
Ambient Temperature (Operating)0°C to 50°C
Storage Temperature (Plastic)-55°C to +125°C
WCLK Frequency6.25 MHz

Frequently asked questions

What is the function of the WAIT signal?

The WAIT output goes true when the controller is internally accessing data or has not accepted data from the host during a WRITE.

How is the TIMCLK signal generated?

TIMCLK is a divided by sixteen version of the WCLK input signal.

What is the purpose of the LINDEX output?

LINDEX is a delayed version of the INDEX input and remains high until reset by the LINR input.

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