AMIC A67L83161/A67L83181/A67L73321/A67L73361 Series Preliminary Datasheet

This document describes the features and characteristics of the A67L83161/A67L83181/ A67L73321/A67L73361 Series 256K X 16/18, 128K X 32/36 LVTTL, flow-through DBATM SRAM.


AMIC A67L83161/A67L83181/A67L73321/A67L73361 Series Preliminary Datasheet - cover page
Brand
AMIC
Category
Memory
Document type
Datasheet
Language
English
Pages
19
File format
PDF
File size
282 KB
Published
08 June, 2012
Updated
29 September, 2023
MD5 checksum
802E9430F7898029E2DA035DA2BC1DE4

About this manual

This document describes the A67L83161, A67L83181, A67L73321, and A67L73361 series of synchronous SRAMs from AMIC Technology. These devices utilize Direct Bus Alternation (DBA) technology to achieve 100% bus utilization during read-write alternations without wait cycles. The chips are available in 256K x 16/18 and 128K x 32/36 configurations with access times ranging from 10ns to 12ns.

What's inside

  • Features
  • General Description
  • Pin Configuration
  • Block Diagram
  • Pin Description
  • Ordering Information

Specifications

Access Time10/11/12 ns
Power Supply Voltage+3.3V + 5%
Package Type100L LQFP

Frequently asked questions

What is the burst mode selection?

A LOW on the MODE pin selects linear burst, while NC or HIGH selects interleaved burst.

How is sleep mode enabled?

Sleep mode is entered by asserting the ZZ (Snooze Enable) input active high.

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