The GS9002 is a monolithic bipolar integrated circuit designed to serialize SMPTE 125M and SMPTE 244M bit parallel digital signals as well as other 8 or 10 bit parallel formats. This device performs the functions of sync detection, parallel to serial conversion, data scrambling (using the X9 + X4 +1 algorithm), 10x parallel clock multiplication and conversion of NRZ to NRZI serial data. It supports any of four selectable serial data rates from 100 Mb/s to over 360 Mb/s. The data rates are set by resistors and are selected by an on-board 2:4 decoder having two TTL level input address lines. Other features such as a sync detector output, a sync detector disable input, and a lock detect output are also provided. The X9 + X4 + 1 scrambler and NRZ to NRZI converter may be bypassed to allow the output of the parallel to serial converter to be directly routed to the output drivers. The GS9002 provides pseudo-ECL outputs for the serial data and serial clock as well as a single-ended pseudo-ECL output of the regenerated parallel clock. The GS9002 directly interfaces with cable drivers GS9007, GS9008 and GS9009. The device requires a single +5 volt or -5 volt supply and typically consumes 713 mW of power while driving 100 Ω loads. The 44 pin PLCC packaging assures a small footprint for the complete encoder function.
The Gennum GS9002 is a monolithic bipolar integrated circuit designed to serialize parallel digital signals into an SMPTE 125M and SMPTE 244M compliant serial format. It accepts 8-bit or 10-bit TTL and CMOS compatible parallel data inputs and supports selectable serial bit rates up to 400 Mb/s.
Key functional blocks include a sync detector, scrambler using the xT + xt + 1 algorithm, NRZ to NRZI converter, and a phase-locked loop for clock multiplication. The device provides pseudo-ECL outputs for serial data and clock and operates from a single +5V or -5V supply.
| Serial Data Rate | 100 Mb/s to 400 Mb/s |
|---|---|
| Supply Voltage | +5V or -5V |
| Power Dissipation (Typical) | 713 mW |
| Package Type | 44 pin PLCC |
The device is fully compatible with the SMPTE-259M serial digital standard.
It accepts 8-bit and 10-bit TTL and CMOS compatible parallel data inputs.
Yes, the scrambler, NRZI converter, and sync detector can be disabled for transparent data transmission.