Describes the usage and features of the LTC3880 multichannel DC/DC converter
The document explains that the LTC3880 is a dual output PolyPhase step-down DC/DC controller with integrated digital power system management, controllable via a PMBus interface built upon I2C/IIC at speeds up to 400kHz. It highlights that while PMBus builds on SMBus and I2C, it dictates specific requirements such as a maximum bus speed of 400kHz and the necessity for repeated starts (restarts) which are not supported by all general-purpose I2C controllers.
The text provides an overview of PMBus transaction formats including send byte, write byte, write word, read byte, read word, and read block. It specifies that these transactions may include a packet error checking (PEC) byte for data integrity and defines the little-endian byte order and big-endian bit order used in the protocol.
| Maximum bus speed | 400kHz |
|---|---|
| Minimum bus speed | 10kHz |
| Clock stretching requirement | Not required at <= 100kHz |
| Read block limit | 255 bytes |
No, repeated starts are not supported by all I2C controllers but are required for PMBus/SMBus reads.
The data ordering specifies that the most significant bit of the least significant byte is always sent first, making it little-endian.
Yes, clock stretching is fully PMBus compliant but it is not required if operating at bus speeds at or below 100kHz.