This document describes a product with a MPEG I/II-Layer 3 hardwired decoder, supporting multiple sampling frequencies and audio control features, as well as external storage interface and communication interface.
The document details the features of the AT8xC51SND1C family, which combines a stand-alone MP3 decoder with a C51 microcontroller core. The family includes three variants: the AT89C51SND1C with Flash memory for In-System Programming (ISP), the AT83SND1C with ROM, and the ROMless AT80C51SND1C.
Key specifications include 64K Bytes of code memory, 2304 Bytes of internal RAM, and support for various sampling frequencies up to 48 kHz. The chip features a built-in USB controller (Full Speed), MMC/SD interface, IDE/ATAPI interface, and multiple communication protocols including UART, SPI, and TWI.
| Core Type | 8-bit MCU C51 Core Based (Fry,x = 20 MHz) |
|---|---|
| Internal RAM | 2304 Bytes |
| Code Memory (AT89C51SND1C) | 64K Bytes Flash |
| Code Memory (AT83SND1C) | 64K Bytes ROM |
| Sampling Frequency | 48, 44.1, 32, 24, 22.05, 16 KHz |
| ADC Channels | 2 Channels 10-bit ADC |
| Operating Voltage | 3V, +10% |
Yes, the AT89C51SND1C allows ISP through an embedded 4K Bytes of Boot Flash memory.