CHIPLUS CS18L10245 DATA SHEET

The CS18LV10245 is a high performance, high speed and super low power CMOS Static Random Access Memory organized as 131,072 words by 8bits and operates from a wide range of 4.5 to 5.5V supply voltage.


CHIPLUS CS18L10245 DATA SHEET - cover page
Brand
CHiPLUS
Category
Memory
Document type
Datasheet
Language
English
Pages
15
File format
PDF
File size
376 KB
Published
05 June, 2012
Updated
01 October, 2023
MD5 checksum
AFA427D2C89E606CCBFC277BD5C9391D

About this manual

The CS18LV10245 is a high performance, high speed and super low power CMOS Static Random Access Memory organized as 131,072 words by 8 bits. It operates from a wide range of 4.5 to 5.5V supply voltage with maximum access times of 55/70ns in 5V operation.

The device features fully static operation, TTL compatible inputs and outputs, and ultra low power consumption with a standby current typical value of 0.50uA at Vcc = 5.0V. It includes an automatic power down feature to reduce power consumption when the chip is deselected.

What's inside

  • Description
  • Features
  • Pin Configurations
  • Block Diagram
  • Pin Descriptions
  • Truth Table
  • Absolute Maximum Ratings
  • DC Electrical Characteristics
  • AC Electrical Characteristics
  • Package Dimensions

Specifications

Organization131,072 words by 8 bits
Operating Voltage Range4.5V ~ 5.5V
Max Access Time (5V)55/70ns
Operating Current (Max)5mA @ 1MHz
Standby Current (Typical)0.50uA
Operating Temperature Range-40°C to +85°C (Industrial)

Frequently asked questions

What is the maximum access time for the CS18LV10245 at 5V?

The maximum access time is 70ns in 5V operation.

What are the available package types for this SRAM?

The device is available in SOP, TSOP-I, and PDIP packages.

Does the CS18LV10245 have an automatic power down feature?

Yes, it has an automatic power down feature that significantly reduces power consumption when the chip is deselected.

Download PDF (376 KB)

More CHiPLUS Manuals


View all CHiPLUS manuals →