ALLEGRO MICROSYSTEMS A6833 DABiC-5 32-Bit Serial Input Latched Sink Drivers handbook

Designed to reduce logic supply current, chip size, and system cost, the A6833 integrated circuits offer high-speed operation for thermal print- ers.


ALLEGRO MICROSYSTEMS A6833 DABiC-5 32-Bit Serial Input Latched Sink Drivers handbook - cover page
Brand
Allegro
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
5
File format
PDF
File size
175 KB
Published
03 May, 2012
Updated
30 September, 2023
Model
DABIC-5
MD5 checksum
18491FFB670AC5052254FABFA6D04421

About this manual

The A6833 integrated circuit provides high‑speed serial‑input latched sink drivers for thermal printheads, multiplexed LED displays, and incandescent lamps. It combines bipolar Darlington outputs with low‑power CMOS logic, Schmitt‑trigger inputs, and a 32‑bit shift register, enabling operation with most microprocessor‑based systems.

The device is supplied in a 44‑lead plastic PLCC package, operates from a 3.3 V–5 V logic supply, and supports up to a 10 MHz data‑input rate. Typical applications include driving thermal printheads, LED display matrices, and low‑current lamp loads, with a peak output current of 125 mA per driver.

What's inside

  • Features
  • Functional Block Diagram
  • Electrical Characteristics
  • Package Information
  • Ordering Information
  • Applications

Specifications

Logic Supply Voltage (VDD) range3.3 V – 5 V
Maximum Output Breakdown Voltage (VOUT)30 V
Continuous Output Current (per driver)125 mA (peak)
Maximum Clock Frequency10 MHz
Package44‑lead PLCC
Power Dissipation (A6833SEP package)2.5 W
Operating Temperature Range–20 °C to +85 °C
Storage Temperature Range–55 °C to +150 °C

Frequently asked questions

What is the recommended logic supply voltage range for the A6833?

The A6833 operates from a 3.3 V to 5 V logic supply.

How much output current can each driver provide?

Each driver can source up to 125 mA of peak output current.

What package does the A6833 use?

The A6833 is supplied in a 44‑lead plastic PLCC (quad‑pack) package.

What is the maximum data‑input clock frequency?

The device supports data‑input rates up to 10 MHz.

Download PDF (175 KB)

More Allegro Manuals


View all Allegro manuals →