The LM3524D is a pulse width modulator with ±1% precision 5V reference. The output drive transistor current carrying capability has been increased to 200 mA while reducing VCEsat and increasing VCE breakdown to 60V. The error-amp common mode voltage range has been increased to 5.5V to eliminate the need for a resistive divider from the 5V reference. In the LM3524D, the circuit bias line has been isolated from the shutdown pin. This prevents the oscillator pulse amplitude and frequency from being disturbed by shutdown. Additionally, at high frequencies (~300 kHz), the max. duty cycle per output has been improved to 44% compared to 35% max. duty cycle in other 3524s. In addition, the LM3524D can now be synchronized externally, through pin 3. A latch has also been added to insure one pulse per period even in noisy environments. The LM3524D includes double pulse suppression logic that insures when a shutdown condition is removed the state of the T-flip-flop will change only after the first clock pulse has arrived. This feature prevents the same output from being pulsed twice in a row, thus reducing the possibility of core saturation.
The LM3524D family is an improved version of the industry‑standard LM3524, offering a +1% precision 5 V reference, 200 mA output current, and a 60 V output capability. New features reduce external circuitry, raise the common‑mode voltage range to 5.5 V, and increase the maximum duty cycle to 44 % at 300 kHz.
The document includes detailed electrical characteristics, absolute maximum ratings, functional block diagrams, and guidance on synchronization, internal voltage regulation, and oscillator design. It also provides typical performance curves and application notes for designers.
| Reference voltage accuracy | +1% precision 5 V |
|---|---|
| Maximum output current per channel | 200 mA DC |
| Maximum output voltage | 60 V |
| Common‑mode input range (error‑amp) | up to 5.5 V |
| Maximum duty cycle at high frequency | 44 % at 300 kHz |
The device includes a +1% precision 5 V reference.
Each output can source up to 200 mA DC.
Synchronization is achieved by interconnecting pin 3 of multiple devices or driving pin 3 with an external clock pulse.