M48Z35, M48Z35Y 256 Kbit (32 Kbit x8) ZEROPOWER® SRAM is an integrated, ultra low power SRAM, power-fail control circuit, and battery. It has read cycle time equal to write cycle time, automatic power-fail chip deselect and write protection function. It is self-contained battery in the CAPHAT™ DIP package, 28-lead SOIC package and SNAPHAT® top (to be ordered separately). It is pin and function compatible with JEDEC standard 32K x 8 SRAMs
The STMicroelectronics M48Z35 and M48Z35Y ZeroPower SRAMs are 32 Kbit × 8 non‑volatile static RAM devices that integrate power‑fail detection and a battery‑backed memory cell on a single die. The handbook provides a detailed description of the device architecture, pin functions, and the two available package options – a 28‑pin CAPHAT™ DIP and a 28‑lead SOIC with a separate SNAPHAT battery module.
Operating modes such as READ, WRITE, Data Retention, and Power‑Down/Up are explained with timing diagrams and electrical characteristics. The document also lists absolute maximum ratings, DC/AC parameters, mechanical dimensions, ordering information, and revision history, making it a comprehensive reference for designers and technicians.
| Write Protect Voltage (VPFD) – M48Z35Y | 4.2 V ≤ VPFD ≤ 4.5 V |
|---|---|
| Supply Voltage (VCC) Range – M48Z35 | 4.75 V to 5.5 V |
| Supply Voltage (VCC) Range – M48Z35Y | 4.5 V to 5.5 V |
| Read Cycle Time | 70 ns |
| Write Cycle Time | 70 ns |
The M48Z35 operates with a VCC of 4.75 V to 5.5 V.