This document describes the features and characteristics of Blackfin® Embedded Processor ADSP-BF531/ADSP-BF532/ADSP-BF533, including high-performance processor, multiple calculation units, ease of programming, and compiler support.
The handbook describes the ADSP-BF531, BF532, and BF533 processors, members of the Blackfin family that combine a dual‑MAC signal‑processing engine with a RISC‑like core. It outlines the portable low‑power architecture, dynamic power‑management features, and the range of on‑chip peripherals such as UART, SPI, SPORTs, timers, watchdog, and real‑time clock.
The document also details the memory architecture, including on‑chip instruction and data SRAM, a 4 KB scratchpad, and external memory interfaces for SDRAM, flash, and SRAM. Booting modes, event handling, and the core and system interrupt controllers are explained, providing developers with the information needed to integrate the processors into embedded systems.
| Maximum Clock Speed | 400 MHz (BF531/BF532), 600 MHz (BF533) |
|---|---|
| Core Voltage Range | 0.8 V to 1.2 V |
| I/O Voltage Tolerance | 3.3 V and 2.5 V tolerant |
| On‑Chip Memory | Up to 148 KB total (16 KB instruction SRAM, up to 32 KB data SRAM, 4 KB scratchpad) |
| DMA Controllers | 12‑channel DMA controller |
| Serial Ports | Two dual‑channel full‑duplex synchronous serial ports |
| UART | UART with IrDA® support |
| Timers | Three Timer/Counters with PWM support |
The BF531 and BF532 run up to 400 MHz, while the BF533 runs up to 600 MHz.
They provide up to 148 KB of on‑chip memory, including 16 KB of instruction SRAM, up to 32 KB of data SRAM, and a 4 KB scratchpad SRAM.
The core voltage can be set between 0.8 V and 1.2 V.