This document describes the features and characteristics of Analog Devices' Blackfin® Embedded Processor ADSP-BF533 Rev. D, including high performance, 16-bit MACs, 40-bit ALUs, 8-bit video ALUs, RISC-like register and instruction model, debug and performance monitoring, memory management unit, etc.
The ADSP-BF533 is a Blackfin family processor that combines a dual‑MAC signal‑processing engine with a RISC‑like core, offering up to 600 MHz performance, flexible voltage options, and a range of high‑speed peripherals. It is designed for low‑power, portable applications and supports dynamic power management.
The device includes up to 148 KB of on‑chip memory, multiple DMA channels, extensive I/O such as UART, SPI, two SPORTs, a parallel peripheral interface, timers with PWM, a real‑time clock, and a watchdog timer. Detailed memory maps, boot modes, and event handling mechanisms are described for system integration.
| Maximum core frequency | 600 MHz |
|---|---|
| Core voltage range | 0.8 V to 1.26 V |
| I/O voltage levels | 1.8 V, 2.5 V, 3.3 V |
| On‑chip memory total | 148 KB |
| Instruction SRAM / Cache | 16 KB |
| Instruction SRAM (non‑cache) | 64 KB |
| Data SRAM / Cache | 32 KB |
| Data SRAM (non‑cache) | 32 KB |
| Scratchpad SRAM | 4 KB |
| Package options | 160‑ball mini‑BGA, 169‑ball lead‑free PBGA |
The processor can operate at up to 600 MHz.
It provides up to 148 KB of on‑chip memory, including 16 KB instruction SRAM/cache, 64 KB instruction SRAM, 32 KB data SRAM/cache, 32 KB data SRAM, and 4 KB scratchpad SRAM.
The device includes a UART port, an SPI port, two SPORTs, a parallel peripheral interface, three timers with PWM, a real‑time clock, and a watchdog timer.