Intersil ISL35822 Datasheet

ISL35822 is an Octal 2.488Gbps to 3.187Gbps/ Lane Retimer from Intersil, supporting speeds from 2.488Gbps to 3.187Gbps, with a working voltage of 1.5V and a 192-pin EBGA-B package.


Intersil ISL35822 Datasheet - cover page
Brand
Intersil
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
75
File format
PDF
File size
1 MB
Published
27 March, 2012
Updated
30 September, 2023
MD5 checksum
162D09B948F0C2ED89A048CB373C74AA

About this manual

The ISL35822 is a 10‑Gbps XAUI/LX4/CX4 re‑timer transceiver built with 0.13 mm pure‑digital CMOS technology. It supports eight lanes of clock and data recovery, offers low‑power operation, and is supplied in a 17 mm square 192‑pin EBGA‑B package.

This document includes a functional block diagram, detailed pin specifications, electrical and timing characteristics, register maps for MDIO, I2C, JTAG, and LASI interfaces, loopback modes, and application guidelines. Ordering information and contact details for Intersil technical support are also provided.

What's inside

  • General Description
  • Functions
  • Receiver Operations
  • Transmitter Operations
  • 8b/10b Coding and Decoding
  • Error Indications
  • Loopback Modes
  • Serial Management Interface
  • Pin Specifications
  • Electrical Characteristics

Specifications

Core Supply Voltage1.5 V (control I/O 2.5 V tolerant)
Technology Node0.13 mm pure‑digital CMOS
Number of Lanes8 lanes of Clock & Data Recovery and Retiming
Operating Data Rate Range2.488 Gbps – 3.1875 Gbps (also 1.244 Gbps – 1.59325 Gbps)
Package17 mm square, 192‑pin EBGA‑B, 1.0 mm pitch

Frequently asked questions

What is the core supply voltage of the ISL35822?

The device uses a 1.5 V core supply and its control I/O pins are 2.5 V tolerant.

How many lanes does the ISL35822 support?

It provides eight lanes of clock and data recovery and retiming.

What package does the ISL35822 use?

The chip is supplied in a 17 mm square 192‑pin EBGA‑B package with a 1.0 mm pitch.

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