This document describes the features of the DS34T101, DS34T102, DS34T104, and DS34T108 single/dual/quad/octal TDM-over-Packet chips from Maxim Integrated Products. These chips allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial stream to be transported transparently over IP, MPLS or Ethernet networks. They support multiple standards-based TDM-over-packet mapping methods and frame-based serial HDLC data flows. The high level of integration available with the DS34T10x devices minimizes cost, board space, and time to market.
The DS34T101/102/104/108 devices combine E1/T1 line interface units, framers and a full‑featured TDM‑over‑packet engine on a single die. They support up to eight E1/T1 streams or one high‑speed E3/T3/STS‑1 stream and can transport TDM data over IP, MPLS or Ethernet networks using a variety of mapping methods.
The manual details the functional architecture, pin assignments, electrical characteristics, operational modes, and application examples, helping designers integrate the chips into carrier‑grade networking equipment.
| Operating Temperature Range | -40 °C to +85 °C |
|---|---|
| Package Types | 484‑lead TEBGA (single, dual, quad) and 484‑lead HSBGA (octal) |
| Core Voltage | 1.8 V |
| Independent Bundles | 64 |
| Ethernet MAC Speed | 10/100 Mbps |
| Clock Signals Required | Two (one for clock recovery, one for packet processing) |
The device supports 64 independent bundles or connections.
Supported methods include SAToP, CESoPSN, TDMoIP AAL1, HDLC, unstructured, structured, and structured with CAS.
The chips operate from –40 °C to +85 °C.
The integrated MAC supports 10 Mbps and 100 Mbps Ethernet.