The MT9076 is a highly integrated T1/E1/J1 termination chip, which contains a long-haul line interface unit (LIU), a high-performance clock recovery loop (PLL), three high-speed HDLC serial interfaces and a Intel or Motorola non-multiplexed 8-bit microprocessor interface.
The MT9076 is a highly featured single‑chip solution for terminating T1/E1/J1 trunks. It combines a low‑jitter PLL, an advanced framer, a long‑haul LIU and three embedded HDLCs, with operating modes selectable via software. The device supports both T1 and E1 standards, including D4, ESF, SLC‑96 and various ITU‑T and Telcordia recommendations.
Pin descriptions, power supply requirements, and detailed functional block diagrams are provided, along with information on the microprocessor interface, framing modes, slip buffers, and performance monitoring features. The manual also covers maintenance channel access, robbed‑bit signaling, and interrupt handling.
| Operating Voltage | 3.3 V (5 V tolerant inputs) |
|---|---|
| Temperature Range | -40 °C to +85 °C |
| Signal Attenuation (T1/J1) | Up to 43 dB (7000 ft of 22 AWG cable) |
| PLL Jitter | < 0.02 UI intrinsic jitter |
| ST‑BUS Stream Rates | 2.048 Mbit/s or 8.192 Mbit/s |
| Inverse MUX for ATM (IMA) | Supported |
| V5.1 / V5.2 Access Networks | Supported |
The device operates at 3.3 V and its inputs are 5 V tolerant.
The LIU can recover signals attenuated by up to 43 dB (equivalent to 7000 ft of 22 AWG cable).
The RESET pin must be held low for a minimum of 11 seconds to reset the device properly.