Industrial

SAA4978H is a Picture Improved Combined Network (PICNIC) integrated circuit with 9-bit analog-to-digital conversion, automatic gain control, time base correction and sample rate conversion.

This document is a data sheet for the SAA4977H product produced by Philips Semiconductors. This product is an integrated circuit with an internal prefilter, clamp circuit, analog AGC, line locked PLL, triple YUV 8-bit analog-to-digital converter (ADC), horizontal compression, field rate up-converter (50 to 100 Hz or 60 to 120 Hz), 4:1:1 digital I/O interface, digital CTI (DCTI), digital luminance peaking, triple 10-bit digital-to-analog converter (DAC), memory controller, embedded microprocessor, 16 kB ROM, and 256 bytes of RAM.

This document is a specification sheet for Philips Semiconductors SAA4974H Besic without ADC. The product features the following characteristics: Field rate up-conversion (50 to 100 Hz or 60 to 120 Hz); 4:1:1 digital input; Digital Colour Transient Improvement (DCTI); Digital luminance peaking; Triple 10-bit Digital-to-Analog Converter (DAC); Memory control.

The SAA4963 is an alignment-free one chip comb filter compatible with NTSC M systems.

SAA4970T is an economical video processing IC (ECOBENDIC) with features such as digital horizontal PLL, digital CTI, digital luminance peaking, digital phase compensation filter, and D/A conversion.

The SAA4960 is an integrated PAL comb filter with adaptive function, compatible with PAL systems, and provides high performance in Y/C separation.

The SAA4956TJ is a 2.9-Mbit field memory with optional field-based noise reduction from Philips Semiconductors.

The SAA4955TJ is a 2.9-Mbit field memory designed for advanced TV applications such as 100/120 Hz TV, PALplus, PIP and 3D comb filter. Its features include: 2949264-bit field memory, 245772 × 12-bit organization, 3.3 V power supply, inputs fully TTL compatible when using an extra 5 V power supply, high speed read and write operations, FIFO operations, optional random access by block function, quasi static operation, write mask function, cascade operation possible, 16 Mbit CMOS DRAM process technology, 40-pin SOJ Package.

This document is the specification sheet of SAA4952WP memory controller, including the features, performance indicators and application scenarios of the memory controller

The SAA4951 is a memory controller designed by Philips for high-end TVs using 2fH technology. The circuit provides all necessary write, read and clock pulses to control different field memory concepts. Furthermore, the drive signals for the horizontal and vertical deflection power stages are generated. The device is connected to a microcontroller via an 8-bit data bus. The controller receives commands via the I2C bus. Due to this fact the start and stop conditions of the main output control signals are programmable and the SAA4951 can be set in different function modes depending on the used TV-feature concept.

The SAA4945H, LIMERIC (LIne MEmory noise Reduction IC) is a 2-D recursive noise reduction filter for both luminance and colour difference signals. The noise reduction is automatically adapted to the global noise level in the image. Ten different preferences of noise reduction can be set using a synchronous receiver transmitter bus; SNERT (Synchronous No parity Eight bit Receive Transmit) bus. Alternatively, the noise reduction can be switched off. The LIMERIC is generally placed directly after the ADC in the video chain.

SAA4700T is a bipolar integrated circuit designed for use in dataline receivers and incorporates a dataline slicer and decoder. The slicer extracts the dataline signal from the video signal and regenerates the data clock. It also provides signals for the decoder in order to decode the binary data that is transmitted in line 16 of every first field of the composite video signal (video programming signal and video recording programming by Teletext, VPS and VPT systems). The decoded information out of words 5 and 11 to 14 is accessed via the built-in I2C-bus interface. This information then can be used for programming a video cassette recorder in order to start and stop a recording of a television program at the correct aligned time, regardless of a delay or extension in the transmission time of the required program.

The SAA4700 is a bipolar integrated circuit designed for use in dataline receivers and incorporates a dataline slicer and decoder. The slicer extracts the dataline signal from the video signal and regenerates the data clock. It also provides signals for the decoder in order to decode the binary data that is transmitted in line 16 of every first field of the composite video signal (video programming signal and video recording programming by Teletext, VPS and VPT systems). The decoded information out of words 5 and 11 to 14 is accessed via the built-in I2C-bus interface. This information then can be used for programming a video cassette recorder in order to start and stop a recording of a television program at the correct aligned time, regardless of a delay or extension in the transmission time of the required program.

This data sheet provides detailed information on the Philips Semiconductors SAA3500H digital audio broadcast channel decoder, including support for DAB transmission modes I, II, III and IV, and an integrated analog-to-digital converter (ADC).

This document is a preliminary specification of Philips Semiconductors SAA3323 drive processor for DCC systems. The drive processor features low power dissipation, single chip digital equalizer, tape formatting, and error correction.