Motorola manuals, page 14
MOTOROLA MJW16018*/MJW16018* handbook
This data sheet provides the maximum ratings for the 1.5 kV SWITCHMODE series bipolar power transistors, including collector-emitter voltage, collector-emitter saturation voltage, emitter-base voltage, emitter-base saturation current, collector current, and emitter current.
MOTOROLA MJW16010A* handbook
This datasheet provides parameters of 1kV SWITCHMODE series bipolar power transistors, including reverse-biased SOA, switching times with inductive loads, saturation voltages, leakage currents, etc.
MOTOROLA MJ16010 MJW16010 MJ6012 MJW16012 handbook
These transistors are designed for high-voltage, high-speed, power switching in inductive circuits where fall time is critical. They are particularly suited for line-operated switchmode applications. The MJ16012 and MJW16012 are selected high gain versions of the MJ16010 and MJW16010 for applications where drive current is limited. • Switching Regulators • Fast Turn-Off Times – TC = 100°C • Inverters 50 ns Inductive Fall Time (Typ) • Solenoids 90 ns Inductive Crossover Time (Typ) • Relay Drivers 800 ns Inductive Storage Time (Typ) • Motor Controls • 100�C Performance Specified for: • Deflection Circuits Reverse-Biased SOA with Inductive Loads Switching Times with Inductive Loads Saturation Voltages Leakage Currents
MOTOROLA MC10E404/MC100E404 handbook(1)
MOTOROLA MC10E404/MC100E404 datasheet(1)
The MC10E404/100E404 is a 4-bit differential AND/NAND device. The differential operation of the device makes it ideal for pulse shaping applications where duty cycle skew is critical. Special design techniques were incorporated to minimize the skew between the upper and lower level gate inputs. Because a negative 2-input NAND function is equivalent to a 2-input OR function, the differential inputs and outputs of the device also allow for its use as a fully differential 2 input OR/NOR function. The output RISE/FALL times of this device are significantly faster than most other standard ECLinPS devices resulting in an increased bandwidth. The differential inputs have clamp structures which will force the Q output of a gate in an open input condition to go to a LOW state. Thus, inputs of unused gates can be left open and will not affect the operation of the rest of the device. Note that the input clamp will take affect only if both inputs fall 2.5V below VCC.
MOTOROLA MC10E337/MC100E337 handbook
MC10E/100E337 is a 3-bit registered bus transceiver with scan.
MOTOROLA MC10E336/MC100E336 handbook
The MC10E/MC100E336 is an integrated circuit that contains three bus transceivers with both transmit and receive registers.
MOTOROLA MC100LVE310/MC100E310 handbook(1)
The MC100LVE310 is a low voltage, low skew 2:8 differential ECL fanout buffer designed with clock distribution in mind. The device features fully differential clock paths to minimize both device and system skew. The LVE310 offers two selectable clock inputs to allow for redundant or test clocks to be incorporated into the system clock trees. The MC100E310 is pin compatible to the National 100310 device. The MC100LVE310 works from a –3.3V supply while the MC100E310 provides identical function and performance from a standard –4.5V 100E voltage supply.
MOTOROLA MC100LVE310/MC100E310 datasheet(1)
The MC100LVE310 is a low voltage, low skew 2:8 differential ECL fanout buffer designed with clock distribution in mind. The device features fully differential clock paths to minimize both device and system skew. The LVE310 offers two selectable clock inputs to allow for redundant or test clocks to be incorporated into the system clock trees. The MC100E310 is pin compatible to the National 100310 device. The MC100LVE310 works from a –3.3V supply while the MC100E310 provides identical function and performance from a standard –4.5V 100E voltage supply.
MOTOROLA MC10E256/MC100E256 handbook(1)
The MC10E/100E256 is a 3-bit 4:1 multiplexer with transparent latches and differential outputs. When the Latch Enable (LEN) is LOW, the latch is transparent, and output data is controlled by the multiplexer select controls. A logic HIGH on LEN latches the outputs. The Master Reset (MR) overrides all other controls to set the Q outputs LOW.
MOTOROLA MC10E256/MC100E256 datasheet(1)
This data sheet provides data for the MC10E/100E256, including pin definitions, function table and logic diagram.
MOTOROLA 8-Bit scannable register MC10E241 MC100E241 handbook(2)
MOTOROLA 8-Bit scannable register MC10E241 MC100E241 handbook(1)
The MC10E/100E241 is an 8-bit shiftable register. Unlike a standard universal shift register such as the E141, the E241 features internal data feedback organized so that the SHIFT control overrides the HOLD/LOAD control. This enables the normal operations of HOLD and LOAD to be toggled with a single control line without the need for external gating. It also enables switching to scan mode with the single SHIFT control line. The eight inputs D0-D7 accept parallel input data, while S-IN accepts serial input data when in shift mode. Data is accepted a setup time before the positive-going edge of CLK; shifting is also accomplished on the positive clock edge. A HIGH on the Master Reset pin (MR) asynchronously resets all the registers to zero.
MOTOROLA 8-Bit scannable register MC10E241 MC100E241 datasheet(1)
MOTOROLA 3-Bit scannable registered address driver MC10E212 MC100E212 handbook(1)
MC10E/100E212 is a scannable registered ECL driver typically used as a fan-out memory address driver for ECL cache driving. It features a maximum clock-to-output delay, dual differential outputs, master reset, and scan output.