MOTOROLA Manuals

The MC10E/100E151 is a 6-BIT D REGISTER produced by Motorola Corporation. It has 1100MHz Min. Toggle Frequency, Differential Outputs, Asynchronous Master Reset, Dual Clocks, Extended 100E VEE Range of – 4.2V to – 5.46V, 75kΩ Input Pulldown Resistors and other features.

The MC10E/100E151 is a 6-bit D register produced by Motorola. It has a minimum toggle frequency of 1100MHz, differential outputs, asynchronous master reset, dual clocks, an extended 100E VEE range from -4.2V to -5.46V, and 75kΩ input pulldown resistors.

This document is MC10E/100E155 datasheet, introduces the function and characteristics of the chip, including pin definition, logic diagram, truth table, characteristic parameters, etc.

This product is the MC10E/100E155 chip data sheet, which introduces the function characteristics, pin definition, logic diagram and other information of the chip.

The MC10E/100E156 is a 3-BIT 4:1 MUX-LATCH circuit with differential outputs, asynchronous master reset, dual latch-enables, extended 100E VEE range of -4.2V to -5.46V, and 75kΩ input pulldown resistors.

MC10E/100E156 is 3-BIT 4:1 MUX-LATCH, includes three 4:1 multiplexers, followed by transparent latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output date is controlled by the multiplexer select controls (SEL0, SEL1). A logic HIGH on either LEN1 or LEN2 (or both) latches the outputs. The Master Reset (MR) overrides all other controls to set the Q outputs LOW.

The MC10E/100E158 is a product that contains five 2:1 multiplexers with differential outputs. The output data are controlled by the Select input (SEL). This product features fast delay characteristics and a wide operating voltage range.

The MC10E/100E160 is a 12-bit parity generator/checker. When the number of input highs is odd, the Q output is high. A high on the Enable input (EN) forces the Q output low. The E160 also features an output register. Multiplexers direct the register input, giving the option of holding present data by asserting HOLD LOW, or of shifting data in through the S-IN pin by asserting SHIFT HIGH. The output register itself is clocked by a positive edge on CLK1 or CLK2 (or both). A high on the reset pin (R) overrides to force the Y output low.

The MC10E/100E163 are two 8:1 multiplexers with differential outputs and common select inputs, produced by Motorola. The select inputs (SEL0, 1, 2) control which one of the eight data inputs (A0-A7, B0-B7) is propagated to the output.

This data sheet provides MC10E/100E164 data, including product features, pin definitions, package dimensions, electrical characteristics, etc.