STMicroelectronics Manuals - Page 198

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STMicroelectronics manuals, page 198

  • ST 74V2G05 handbook

    This document describes the features and characteristics of the 74V2G05 triple inverter (open drain), including high speed, low power dissipation, high noise immunity, and power down protection.

  • ST 74V2G04 handbook

  • ST 74V2G03 handbook

    74V2G03 is an advanced high-speed CMOS DUAL 2-INPUT OPEN DRAIN NAND GATE fabricated with sub-micron silicon gate double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. The device can, with an external pull-up resistor, be used in wired AND configuration. This device can also be used as a led driver in any other application requiring current sink. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

  • ST 74V2G02 handbook

    The 74V2G02 is a dual 2-input NOR gate from the 74 series, which is fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It features high speed, low power dissipation, high noise immunity and wide input voltage range. It can be used to implement logic operations.

  • ST 74V2G00 handbook

    The 74V2G00 is a high-speed CMOS DUAL 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

  • ST 74V1T86 handbook

    The 74V1T86 is an advanced high-speed CMOS SINGLE EXCLUSIVE OR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology, which has low power dissipation, high speed, wide input voltage range, wide output voltage swing, large output current and strong input and output anti-interference ability, and can be used between 5V and 3V interface.

  • ST 74V1T80 handbook

    This document describes the 74V1T80 high-speed CMOS positive edge triggered D-type flip-flop with inverted output. The product features high speed, low power dissipation, compatibility with TTL outputs, etc., making it suitable for portable applications.

  • ST 74V1T79 handbook

    The document describes a high-speed CMOS single positive edge triggered D-type flip-flop. The flip-flop is fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology and is designed to operate from 4.5V to 5.5V. It features high speed, low power dissipation, compatibility with TTL outputs, and can be used to interface 5V to 3V systems.

  • ST 74V1T77 handbook

    The document describes the features and characteristics of a high-speed CMOS single D-type latch, including high-speed transmission rate, low power dissipation, compatibility with TTL outputs, etc. The product is designed to operate from 4.5V to 5.5V, making it ideal for portable applications.

  • ST 74V1T70 handbook

    74V1T70 is an advanced high-speed CMOS SINGLE BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage. This device can be used to interface 5V to 3V.

  • ST 74V1T66 handbook

    74V1T66 is a single bilateral switch fabricated in silicon gate C2MOS technology, which features high speed and low power consumption, and can convert signals within the power supply range.

  • ST 74V1T384 handbook

    74V1T384 is a high-performance CMOS single high-speed bus switch fabricated in silicon gate C2MOS technology.

  • ST 74V1T32 handbook

    74V1T32 is a single 2-input OR gate chip in the 74 series. It is fabricated using sub-micron silicon gate and double-layer metal wiring C2MOS technology. It provides high noise immunity and stable output. The voltage range is 0-7V, which can be used for 5V to 3V level interfaces.

  • ST 74V1T14 handbook

    This document describes the features and characteristics of the 74V1T14 single Schmitt inverter, including high speed, low power dissipation, typical hysteresis, power down protection on input, symmetrical output impedance, etc.

  • ST 74V1T126 handbook

    The 74V1T126 is an advanced high-speed CMOS SINGLE BUS BUFFER with features such as low power dissipation and compatibility with TTL outputs.