STMicroelectronics manuals, page 197
ST STi5100 handbook
The STi5100 is a low-cost interactive set-top box decoder from ST company. It has ST20 32-bit VL-RISC CPU, 243 MHz frequency, 8Kbyte ICache, 8Kbyte DCache, 4Kbyte SRAM, supports DVB and DIRECTV, integrates DES-ECB, DVB and ICAM descramblers, supports NDS RASP as well as low cost DVB-CI and Cable Card, supports MPEG-2 MP@ML video decoder, has smooth fast forward and rewind functions, and supports audio.
ST STi5514 handbook
STi5514 is an integrated circuit from STMicroelectronics that integrates a 32-bit CPU, an MPEG-2 decoder and many of the peripheral functions required by today’s powerful STBs. It can also simultaneously demultiplex three transport streams and manage multiple descrambling modes and conditional access standards.
ST 74V2G74 handbook
The document introduces a high-speed CMOS single D-type flip-flop with preset and clear functions. It is fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The flip-flop features high speed, low power dissipation, high noise immunity, etc.
ST 74V2G70 handbook
The document describes the features and characteristics of the high-speed CMOS triple buffer 74V2G70, which was released on June 1, 2003. These features include high-speed transmission, low power consumption, high noise immunity, power down protection on inputs and outputs, symmetrical output impedance, balanced propagation delays, and operating voltage range.
ST 74V2G66 handbook (1)
This document describes the features and characteristics of the 74V2G66 dual bilateral switch, including high-speed propagation delay, low power dissipation, low on-resistance, and wide operating voltage range.
ST 74V2G66 handbook
The 74V2G66 is an high-speed CMOS DUAL BILATERAL SWITCH fabricated in silicon gate C2MOS technology. It achieves high speed propagation delay and VERY LOW ON resistances while maintaining true CMOS low power consumption.
ST 74V2G384 handbook
The 74V2G384 is an advanced high-speed CMOS DUAL HIGH SPEED BUS SWITCH fabricated in silicon gate C2MOS technology. It's designed to operate from 3V to 5.5V, making this device ideal for portable applications. It's offers 7Ω Resistance typical value at VCC=4.5V. Additional key feature are fast switching speed (tON=3.8ns, tOFF=3.3ns Typical) and Low Power Consumption.
ST 74V2G32 handbook
74V2G32 is a high-performance dual 2-input or gate in the 74 series with high noise immunity, low power consumption and high speed characteristics.
ST 74V2G241 handbook
The document describes the features and characteristics of the 74V2G241, an advanced high-speed CMOS dual bus buffer non-inverter. It includes high-speed transmission, low power consumption, high noise immunity, and input/output protection. This product is suitable for interfacing 5V to 3V systems and is ideal for portable applications.
ST 74V2G14 handbook
This document describes the features and characteristics of the 74V2G14, a high-speed CMOS triple Schmitt trigger inverter. It features high speed, low power dissipation, hysteresis, and power down protection on inputs and outputs. The product is suitable for interfacing 5V to 3V systems and is ideal for portable applications such as personal digital assistants, camcorders, and battery-powered equipment.
ST 74V2G132 handbook
74V2G132 is a high-speed CMOS dual 2-input NAND gate fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. Pin configuration and function are the same as those of the 74V2G00 but the 74V2G132 has hysteresis. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.
ST 74V2G126 handbook
74V2G126 is a dual bus buffer with high speed, low power consumption, high noise immunity, power down protection and balanced propagation delay
ST 74V2G125 handbook
ST 74V2G08 handbook
The 74V2G08 is an advanced high-speed CMOS DUAL 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.
ST 74V2G07 handbook
The 74V2G07 is a high performance CMOS triple buffer with low power consumption, high noise immunity and stable output.