STMicroelectronics 74V2G70 Triple Not Inverted Buffer Datasheet

The document describes the features and characteristics of the high-speed CMOS triple buffer 74V2G70, which was released on June 1, 2003. These features include high-speed transmission, low power consumption, high noise immunity, power down protection on inputs and outputs, symmetrical output impedance, balanced propagation delays, and operating voltage range.


STMicroelectronics 74V2G70 Triple Not Inverted Buffer Datasheet - cover page
Brand
STMicroelectronics
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
9
File format
PDF
File size
86 KB
Published
08 August, 2012
Updated
28 September, 2023
MD5 checksum
06211F7DBD923CB12C2DFCB0923786FC

About this manual

The 74V2G70 is an advanced high-speed CMOS triple not inverted buffer fabricated with sub-micron silicon gate and double-layer metal wiring technology. The internal circuit consists of three stages including a buffer output, providing high noise immunity and stable output. Power down protection is provided on all inputs and outputs, allowing 0 to 7V to be accepted on inputs regardless of the supply voltage.

What's inside

  • Description
  • Pin Connection
  • Order Codes
  • Absolute Maximum Ratings
  • Recommended Operating Conditions
  • DC Specifications
  • AC Electrical Characteristics
  • Capacitance Characteristics
  • Dynamic Switching Characteristics
  • Mechanical Data

Specifications

Operating Voltage Range2V to 5.5V
Propagation Delay Time (Typ)3.0ns
Quiescent Supply Current (Max)1 µA
Noise Immunity28% VCC
Output Impedance (Min)8 mA
Package TypeSOT23-8L

Frequently asked questions

What is the operating voltage range for the 74V2G70?

The operating voltage range is 2V to 5.5V.

Does the 74V2G70 have power down protection?

Yes, power down protection is provided on all inputs and outputs.

Can the 74V2G70 interface 5V to 3V systems?

Yes, this device can be used to interface 5V to 3V systems.

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