TMS320C5x and TMS320LC5x are digital signal processors with a powerful 16-bit TMS320C5x CPU. They have a single-cycle instruction execution time of 20, 25, 35, and 50 ns for 5V operation, and 25, 40, and 50 ns for 3V operation. They also feature single-cycle 16x16-bit multiply/add, a maximum addressable external memory space of 224Kx16-bit, on-chip program ROM with sizes ranging from 2K to 32Kx16-bit, on-chip program/data RAM (SARAM) with sizes ranging from 1K to 9Kx16-bit, on-chip dual-access program/data RAM (DARAM) with a size of 1K, full-duplex synchronous serial port for coder/decoder interface, time-division-multiplexed (TDM) serial port, hardware or software wait-state generation capability, on-chip timer for control operations, repeat instructions for efficient use of program space, buffered serial port, host port interface, multiple phase-locked loop (PLL) clocking options (x1, x2, x3, x4, x5, x9 depending on the device), block moves for data/program management, on-chip scan-based emulation logic, boundary scan, and five packaging options. It also has low power dissipation and power-down modes, consuming 47 mA (2.35 mA/MIP) at 5V and 40 MHz.
