TEXAS Manuals

This file is about UCC2800 series, it is a dc-to-dc fixed frequency current mode switching power supply controller, with built-in soft start function, which can meet automotive application scenarios

The document describes the features of OPA604, including low distortion, low noise, high slew rate, wide gain-bandwidth, etc. It also provides information about the applications and description of the product.

The TPS2375/77 is TI’s second generation IEEE 802.3af PoE powered device controller with 100-V ratings and a 0.58-Ω low-side switch. It integrates all the necessary features to develop a compliant powered device (PD).

The document describes a product called TPS54620, which is a full-featured 17V, 6A synchronous step-down converter. It features high efficiency, integrated high-side and low-side MOSFETs, adjustable input undervoltage lockout, and support for SwitcherPro™ software tool.

The document describes the features and characteristics of the TPS68000 highly efficient phase shift full bridge CCFL controller, including input voltage range, full bridge topology with integrated gate drives, synchronizable constant frequency operation, etc.

This document is a typical application description of the bq2420x series, which details the product's features and characteristics.

This data sheet is applicable to CD54/74AC299, CD74AC323, CD54/74ACT299, and CD54ACT323. The CD54AC323 and CD74ACT323 were not acquired from Harris Semiconductor. Data sheet acquired from Harris Semiconductor SCHS288.

SCHS122G is a digitally controlled analog switch developed by Harris Semiconductor. It uses silicon gate CMOS technology and operates in a similar way to LSTTL, with low power consumption. The switch voltage range is 0V to 10V, and the load voltage range is ±5V. It has low resistance, low crosstalk, and fast switching.

CDC2510 is a 3.3V low-skew low-jitter phase-lock loop clock driver designed for synchronous DRAM applications. It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. The CDC2510 operates at 3.3V VCC and provides integrated series-damping resistors that make it ideal for driving point-to-point loads. A bank of ten outputs provides ten low-skew, low-jitter copies of CLK. Output signal duty cycles are adjusted to 50 percent, independent of the duty cycle at CLK. All outputs can be enabled or disabled via a single output enable input. When the G input is high, the outputs switch in phase and frequency with CLK; when the G input is low, the outputs are disabled to the logic-low state. Unlike many products containing PLLs, the CDC2510 does not require external RC networks. The PLL's loop filter is included on-chip, minimizing power consumption and cost.

The REG103 is a family of low-noise, low-dropout, linear regulators with low ground pin current. Its new DMOS topology provides significant improvement over previous designs, including low-dropout voltage (only 115mV typ at full load), and better transient performance. In addition, no output capacitor is required for stability, unlike conventional low-dropout regulators that are difficult to compensate and require expensive low ESR capacitors greater than 1µF. Typical ground pin current is only 1mA (at IOUT = 500 mA) and drops to 0.5µA in not enabled mode. Unlike regulators with PNP pass devices, quiescent current remains relatively constant over load variations and under dropout conditions. The REG103 has very low output noise (typically 33µVrms for VOUT = 3.3V with CNR = 0.01µF), making it ideal for applications requiring high precision and low noise.

SN54BCT244, SN74BCT244 are octal buffers/drivers with 3-state outputs from Texas Instruments Incorporated. These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The SN54LV541A, SN74LV541A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS is an integrated circuit manufactured by TI. The chip uses the EPIC(Enhanced-Performance Implanted CMOS) process, has a 2-V to 5.5-V VCC operating voltage, and has a latch-up performance of 250 mA per JESD 17 and an ESD protection of 200 V per MIL-STD-883, Method 3015.

This document contains packaging information and orderable device status for supplier 74365. The document lists detailed information about different models of the product, including package type, number of pins, package quantity, etc.

This document describes the features and characteristics of the SCES337G model. The product supports 2V to 5.5V VCC operation and has low output ground bounce and high output VOH undershoot. The outputs are disabled during power up and power down with inputs tied to VCC. The product supports mixed-mode voltage operation on all ports and has latch-up performance exceeding 100mA and ESD protection exceeding 2000V.

This datasheet provides detailed information on the SN74LVC2G38, including its features, specifications, and ordering information.