TEXAS Manuals

CD4011UB is a dual input four-input NAND gate from TI. It is low power, high speed and high reliability. It is available in 14-pin hermetic dual-in-line ceramic (F3A suffix), 14-lead dual-in-line plastic (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

This data sheet details the features of the CD54HC30/CD54HCT30 8-input NAND gate.

This data sheet provides detailed information on SN74ALVC08 quadruple 2-input positive-AND gate characteristics including operating voltage range, maximum propagation delay, output drive current, latch-up performance, ESD protection, etc.

CD4093B is a voltage output dual D flip-flop manufactured by Texas Instruments.

This document describes the features and characteristics of the SLLS563B model, which is an optimized half-duplex differential transceiver for PROFIBUS networks. It meets the requirements of EN 50170 and TIA/EIA-485-A standards, supports signaling rates up to 40 Mbps, and has features such as low bus capacitance and short-circuit current limit.

The TLV5638 is a low-power dual 12-bit digital-to-analog converter with internal reference and power down function.

This datasheet provides detailed information on the SN74LV21A device, including functionality, operating voltage range, maximum tpd, typical VOLP, typical VOHV, Ioff, Latch-Up performance, ESD protection, etc.

This document mainly introduces the product's features and characteristics, including 2-V to 5.5-V VCC operation, max tpd of 7ns at 5V, typical VOLP (Output Ground Bounce) less than 0.8V at VCC=3.3V, typical VOHV (Output VOH Undershoot) greater than 2.3V at VCC=3.3V, support all ports of mixed-mode voltage operation, Ioff support partial-power-down mode operation, latch-up performance exceeds 100mA per JESD 78, class II, ESD protection exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) etc.

This document mainly introduces the features and characteristics of the SN74LV10A series products, including the working voltage range, the maximum tpd, the typical VOLP, the typical VOHV, etc.

SN54HCT08 and SN74HCT08 are four independent 2-input AND gates that perform the Boolean function Y = A • B or Y = A • B in positive logic. They operate in a voltage range of 4.5 V to 5.5 V and have an output current of ±4 mA and an input current of 1 µA. The package forms are PDIP-N, SOIC-D, SOIC-D, DIP-N, SOP-NS, SSOP-DB, TSSOP-PW, TSSOP-PW, CDIP-J, and CFP-W.

This data sheet provides detailed information on the SN54F11/SN74F11 3-input AND gates, including their functions, pin configurations, and appearance.

The SN74LV132A is a quad positive-NAND gate designed for 2-V to 5.5-V VCC operation. It performs the Boolean function Y = A • B or Y = A + B in positive logic.

This document describes the features and characteristics of the SN54AC00 and SN74AC00 products. They are four independent 2-input NAND gates, and each gate performs the Boolean function of Y = A × B or Y = A + B in positive logic. These products are designed for 2V to 6V voltage operation, accept voltages up to 6V, and have a maximum propagation delay of 7ns.

The SN54HC10 and SN74HC10 are three-input NAND gates with a wide operating voltage range of 2V to 6V, outputs that can drive up to 10 LSTTL loads, low power consumption, typical tpd of 9ns, and output drive of ±4mA at 5V with an input current of 1µA.