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DM74164 is an 8-bit serial in/parallel out shift register produced by Fairchild Semiconductor Corporation. It has gated serial inputs and asynchronous clear function, which can completely control the input data.
This is the datasheet of DM7417 Hex Buffers with High Voltage Open-Collector Outputs chip produced by Fairchild Semiconductor Corporation. The chip contains six independent gates, each of which performs a buffer function. External pull-up resistors are used for proper logical operation.
This is a datasheet for DM74174 Hex/Quad D-Type Flip-Flop with Clear. The flip-flops utilize TTL circuitry to implement D-type flip-flop logic and have a direct clear input. Information at the D inputs meeting the setup and hold time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the HIGH or LOW level, the D input signal has no effect at the output. The product contains six flip-flops with single-rail outputs and features buffered clock and direct clear inputs.
DM7426 is a quad 2-input NAND gates with high voltage open-collector outputs manufactured by Fairchild Semiconductor Corporation. The open-collector outputs require external pull-up resistors for proper logical operation.
This document describes the DM7438 and 7438 Quad 2-Input NAND Buffers with Open-Collector Outputs, introduced by Fairchild Semiconductor Corporation in 2000. The device contains four independent gates, each performing the logic NAND function. The open-collector outputs require external pull-up resistors for proper logical operation.
DM7442A is a BCD to decimal decoder manufactured by Fairchild Semiconductor Corporation. It consists of eight inverters and ten four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of input logic ensures that all outputs remain off for all invalid (10-15) input conditions. DM7442A features include diode-clamped inputs, also for application as 4-line-to-16-line decoders and 3-line-to-8-line decoders, all outputs are high for invalid input conditions, typical power dissipation of 140 mW and typical propagation delay of 17 ns.
The DM7474 is a dual positive-edge-triggered D-type flip-flop with preset, clear, and complementary outputs. It contains two independent positive-edge-triggered D-type flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock. The data on the D input may be changed while the clock is LOW or HIGH without affecting the outputs as long as the data setup and hold times are not violated. A LOW logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs. The document also provides a connection diagram and a function table.
The 5497 is a synchronous 6-stage binary counter that outputs a pulse rate at a sub-multiple of the input frequency. The output pulse rate relative to the clock frequency is determined by signals applied to the Select (S0-S5) inputs. Both true and complement outputs are available, along with an enable input for each. A Count Enable input and a Terminal Count output are provided for cascading two or more packages. An asynchronous Master Reset input prevents counting and resets the counter.
This document describes the features and characteristics of a quad 2-input NAND gate called DM74ALS00A. The device contains four independent gates, each of which performs the logic NAND function.
