ANALOG Manuals

This data sheet introduces the ADF4158, a 6.1 GHz, fractional-N frequency synthesizer with a 25-bit fixed modulus that allows subhertz frequency resolution, frequency and phase modulation capability, sawtooth and triangular waveforms in the frequency domain, parabolic ramp, superimposed FSK ramp, ramp with 2 different sweep rates, ramp delay, ramp frequency readback, ramp interruption, 2.7 V to 3.3 V power supply, separate VP allows extended tuning voltage, programmable charge pump currents, 3-wire serial interface, digital lock detect, power-down mode, cycle slip reduction for faster lock times, switched bandwidth fast-lock mode, qualified for automotive applications.

The ADF4150 is a Fractional-N/Integer-N PLL Synthesizer with features such as programmable divide-by-1/-2/-4/-8/-16 output, 5.0 GHz RF bandwidth, 3.0 V to 3.6 V power supply, and 1.8 V logic compatibility.

The ADF4196 frequency synthesizer can be used to implement local oscillators (LO) in the upconversion and downconversion sections of wireless receivers and transmitters. Its architecture is specifically designed for low phase noise, fast settling, and a 6 GHz PLL frequency synthesizer. It features fast settling, fractional-N PLL architecture, a single PLL that replaces ping-pong synthesizers, frequency hopping across the GSM band in 5 μs with phase settled within 20 μs, 1 degree rms phase error at 4 GHz RF output, digitally programmable output phase, RF input range up to 6 GHz, 3-wire serial interface, on-chip low noise differential amplifier, and a phase noise figure of merit of -216 dBc/Hz.

This document introduces the features of ADF4151, including frequency range, power supply, logic compatibility, pre-divider, RF output phase, serial interface, locking detection, switched bandwidth fast lock mode, cycle slip reduction and so on.

ADF4351 is a wideband frequency synthesizer with integrated VCO. It features programmable fractional-N and integer-N frequency synthesizers, low phase noise VCO, programmable prescaler, programmable output power level, etc. This product is suitable for wireless infrastructure, test equipment, wireless LANs, etc.

The ADF5001 is a low noise, low power, fixed RF divider that can divide frequencies as high as 18 GHz to a lower frequency suitable for input into a PLL IC, such as the ADF4156 or ADF4106. The ADF5001 provides a divide-by-4 function and operates off a 3.3 V supply with differential 100Ω RF outputs.

The ADF5002 is a low noise, low power, fixed RF divider block that can be used to divide down frequencies as high as 18 GHz to a lower frequency suitable for input to a PLL IC, such as the ADF4156 or the ADF4106.

The ADF5000 is a low-noise, low-power, fixed RF divider block that can be used to divide frequencies as high as 18 GHz by 2 to produce a lower frequency suitable for input to a PLL IC, such as the ADF4156 or the ADF4106.

ADCLK954 Rev. B is a low jitter clock fanout buffer, which features 2 selectable differential inputs, 12 LVPECL outputs, 4.8 GHz operating frequency, 75 fs rms broadband random jitter, and 3.3 V power supply.

The document describes the features and characteristics of SiGe Clock Fanout Buffer ADCLK950 Rev. A, including 2 selectable inputs and 10 LVPECL outputs, operating frequency of 4.8 GHz, 75 fs rms broadband random jitter, on-chip input terminations. It is suitable for applications such as low jitter clock distribution, clock and data signal restoration, level translation, wireless communications, wired communications, medical and industrial imaging, ATE and high performance instrumentation.

ADCLK948 is a SiGe clock fanout buffer with 2 selectable differential inputs and 8 LVPECL outputs. It operates at a frequency of 4.8 GHz and has a broadband random jitter of 75 fs rms. The product also features on-chip input terminations and a 3.3V power supply.

The ADCLK946 is an ultrafast clock fanout buffer designed for high-speed applications requiring low jitter. It is fabricated on Analog Devices' proprietary XFCB3 silicon germanium (SiGe) bipolar process. The device operates at a frequency of 4.8 GHz and has a broadband random jitter of 75 fs rms. It supports various input types and can be used in clock distribution, signal restoration, level translation, wireless and wired communications, medical and industrial imaging, ATE, and high-performance instrumentation.

ADCLK914 is a ultrafast, SiGe, Open-Collector HVDS Clock/Data Buffer from Analog Devices. It has a 7.5 GHz operating frequency, 160 ps propagation delay, 100 ps output rise/fall time, 110 fs random jitter, On-chip input terminations, Extended industrial temperature range:-40°C to +125°C, 3.3 V power supply (VCC-VEE) etc. ADCLK914 is widely used in clock and data signal restoration, high speed converter clocking, broadband communications, cellular infrastructure, high speed line receivers, ATE and high performance instruments etc.

The ADCLK905/ADCLK907/ADCLK925 are ultrafast SiGe ECL clock/data buffers. They feature a propagation delay of 95 ps, a toggle rate of 7.5 GHz, a typical output rise/fall time of 60 ps, and a random jitter of 60 fs. They are suitable for clock and data signal restoration and level shifting, automated test equipment (ATE), high-speed instrumentation, high-speed line receivers, and converter clocking applications.