The 74LV165 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs (Q7 and Q7) available from the last stage.
The NXP 74LV165 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs available from the last stage. It supports synchronous parallel-to-serial applications and is optimized for low voltage operations ranging from 1.0 V to 3.6 V. The device features a gate-OR clock structure allowing one input to function as an active LOW clock enable input, facilitating flexible circuit design.
| Supply voltage range | 1.0 V to 5.5 V |
|---|---|
| Package types | DIP16, SOT109-1, SSOP16, TSSOP16 |
| ESD protection (HBM) | exceeds 2000 V |
| Latch-up performance | exceeds 250 mA |
When the parallel-load input (PL) is LOW, parallel data from inputs D0 to D7 are loaded into the register asynchronously.
Data enters serially at input DS and shifts one place to the right with each positive-going clock transition.
Yes, the pin assignment for the inputs CP and CE is arbitrary and can be reversed for layout convenience.