Key facts
- Brand
- Xilinx
- Model
- XC5200
- Industry
- Industrial
- Documents
- 2
- Languages
- EN
- Last added
- 2012-06-06
Start here
DatasheetXILINX XC5200 Series Field Programmable Gate Arrays Data Sheet
Xilinx XC5200 specifications
| Logic Cells | 256 to 1,936 |
|---|---|
| Process Technology | 0.5 µm three‑layer metal CMOS |
| Maximum Clock Speed | Beyond 50 MHz (benchmarked >66 MHz) |
| I/O Pin Current | 8 mA source and sink |
| JTAG Boundary Scan | Built‑in IEEE 1149.1 support on all I/O pins |
| Global Buffers | Four per device |
All Xilinx XC5200 documents by type
Datasheet 1
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
How many logic cells are available in XC5200 devices?
Devices range from 256 to 1,936 logic cells.
What current can each I/O pin source or sink?
Each I/O pin can source and sink up to 8 mA.
