Key facts
- Brand
- Actel
- Model
- 54SX
- Category
- Other Electronics
- Documents
- 3
- Languages
- EN
- Last added
- 2012-06-05
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Actel 54SX Family FPGAs Datasheet
The Actel 54SX Family FPGAs feature a unique 'sea-of-modules' architecture that integrates combinatorial cells (C-cells) and register cells (R-cells) with routing resources between metal layers. This design eliminates traditional channels, allowing for an uninterrupted grid of logic modules which simplifies design time and reduces costs.
Key performance features include up to 320 MHz internal performance, a clock-to-out delay as low as 3.7 ns, and input set-up times down to 0.1 ns. The family offers various device capacities ranging from 8,000 to 48,000 system gates with options for commercial, industrial, and military temperature grades.
Actel 54SX specifications
| Internal Performance | 320 MHz |
|---|---|
| Clock-to-Out (Pin-to-Pin) | 3.7 ns |
| Input Set-Up | 0.1 ns |
| Clock Skew | 0.25 ns |
| System Gates Range | 12,000 to 48,000 |
| User-Programmable I/O Pins | Upto 249 |
| Flip-Flops | Up to 1080 |
All Actel 54SX documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What is the maximum internal performance of the 54SX Family?
The maximum internal performance is 320 MHz.
Does the 54SX Family support PCI compliance?
Yes, specific models in the family are PCI compliant.
What is the maximum clock‑to‑out delay for the 54SX devices?
The 54SX devices achieve a clock‑to‑out (pin‑to‑pin) delay of 3.7 ns.
What supply voltages are supported by the 54SX family?
The family operates at 3.3 V and tolerates 5.0 V input levels.
What is the maximum clock‑to‑out (pin‑to‑pin) performance?
The devices achieve a clock‑to‑out time of 3.7 ns.
How many system gates does the A54SX32 device provide?
The A54SX32 device provides approximately 48 000 system gates.