This document describes the features and characteristics of the ADP7182 low noise linear regulator, including low noise, PSRR value, positive or negative enable logic, stable with small output capacitor, etc.
The ADP7182 is a CMOS, low dropout (LDO) linear regulator designed for high performance analog and mixed signal circuits. It operates from an input voltage range of −2.7 V to −28 V and provides up to −200 mA of output current. The device features low noise at 18 μV rms and a power supply rejection ratio (PSRR) of 66 dB at 10 kHz.
The regulator is available in fixed output voltage versions (−5 V, −1.8 V, −2.5 V, −3 V, −1.2 V, −1.5 V) and an adjustable version allowing outputs from −1.22 V to −V IN + V DO. It supports 6-lead and 8-lead LFCSP packages as well as a 5-lead TSOT package.
| Input Voltage Range | -2.7 V to -28 V |
|---|---|
| Maximum Output Current | -200 mA |
| Power Supply Rejection Ratio (PSRR) @ 10 kHz | 66 dB |
| Dropout Voltage @ -200 mA | -185 mV to -360 mV |
| Quiescent Current @ -200 mA Load | -650 μA to -850 μA |
| Shutdown Current | -2 μA to -8 μA |
| Operating Temperature Range | -40°C to +125°C |
The device operates from an input voltage range of −2.7 V to −28 V.
The ADP7182 can provide up to −200 mA of output current.
Yes, with EN = GND, the shutdown current is typically -2 μA and can reach up to -8 μA.