The STMPE801 is a GPIO (General Purpose Input/Output) port expander that can interface with a main digital ASIC via the two-line bidirectional bus (I2C). A separate GPIO Expander IC is often used in Mobile-Multimedia platforms to solve the problems of the limited amounts of GPIOs usually available on the Digital Engine. The STMPE801 offers great flexibility as each I/O is configurable as input or output. This device has been designed with very low quiescent current and includes a wake-up feature for each I/O to optimize the power consumption of the IC.
The STMPE801 is an 8-bit GPIO (General Purpose Input/Output) port expander from STMicroelectronics that interfaces a main digital ASIC through a two-line bidirectional I2C bus. Each I/O is configurable as an input or an output, and the device includes an interrupt output pin, a reset input pin and a wake-up feature on each I/O to keep power consumption low. It is offered in QFN16L and SO-16 packages.
This datasheet covers the block diagram, pin connection and pin assignment for both packages, maximum ratings and thermal data, DC electrical characteristics, the I2C module (addresses, timing, start and stop conditions, acknowledge bit, read and write operations, general call, turning the I2C block off and on), the register map, interrupt and power supply behaviour, package mechanical data and the revision history.
| Operating voltage (VCC) | 1.65 V to 3.6 V |
|---|---|
| I/O voltage (VIO) | 1.65 V to 3.6 V |
| Suspend current | < 1 µA |
| SCL clock frequency (max) | 400 kHz |
| Operating ambient temperature | -40 to +85 °C |
| Devices per bus | Up to 2 devices sharing the same bus (1 address line) |
| Packages | QFN16L (2.6mm x 1.8mm) and SO-16 |
The core supply voltage VCC and the I/O supply voltage VIO both range from 1.65 V to 3.6 V.
Up to 2 devices can share the same bus using one address line.
It supports standard mode up to 100 kbps and fast mode up to 400 kbps, and is compliant to the Philips I2C specification version 2.1.
Yes, the STMPE801 includes a wake-up feature on each I/O to optimize power consumption.