The IP described in this document is scheduled for product obsolescence and discontinued support. Therefore, Altera does not recommend use of this IP in new designs. For more information about Altera’s current IP offering, refer to Altera’s Intellectual Property website.
The Altera cPOS-PHY Level 2 and 3 Compiler is a software tool that generates MegaCore functions for link-layer or physical layer (PHY) devices transferring data to and from packet over SONET/SDH (POS) devices. It supports traffic rates up to 3.2 Gbps for Level 3 and 832 Mbps for Level 2, compliant with relevant POS-PHY specifications and the Atlantic Interface Specification. The compiler allows for the creation of bridges between different POS-PHY interfaces and supports both Single-PHY (SPHY) and multi-PHY (MPHY) operations.
| POS-PHY Level 3 Max Rate | 3.2 gigabits per second (Gbps) |
|---|---|
| POS-PHY Level 2 Max Rate | 832 megabits per second (Mbps) |
| Supported Interfaces | Link-layer or PHY-layer POS-PHY interfaces |
| Bus Widths | Selectable POS-PHY interface bus widths (8/16/32 bit) |
| Atlantic Interface Widths | 8/16/32/64 bit |
| Device Family Support | Arria, Cyclone, HardCopy, Stratix |
The compiler supports POS-PHY level 3 operating at up to 3.2 Gbps.
Yes, it includes an Atlantic interface that allows a consistent interface between all Altera cell and packet MegaCore functions.
Yes, MegaCore functions provide full support for target Altera device families and may be used in production designs.