This document is the Altera Corporation's CRC Compiler User Guide 9.1 version user guide
The CRC Compiler is a MegaCore function distributed with the Quartus II software that generates high-performance circuits for generating or checking Cyclic Redundancy Check (CRC) checksums for packet-based communication. It supports various device families, including Arria, Cyclone, and Stratix series, with support levels ranging from full to preliminary depending on the specific device family and speed grade.
| Supported CRC Polynomials | CRC-32, CRC-16-ANSI, and CRC-16-CCITT |
|---|---|
| Maximum Operation Frequency | over 250 MHz |
| Configurable Input Datapath Width | 1 to 256 bits (power-of-two) |
| Interface Type | Avalon Streaming (Avalon-ST) |
| Memory Usage | None |
Altera runs comprehensive regression tests and verifies results against bit-accurate master simulation models.
For MegaCore functions, the untethered timeout is 1 hour.