Fairchild 74F113 Dual JK Flip-Flop Datasheet

74F113 Dual JK Negative Edge-Triggered Flip-Flop

Brand: Fairchild
Document type: Datasheet
Language: English
Pages: 6
File format: PDF
File size: 61 KB
Published: 07 August, 2012
Updated: 30 September, 2023
Model: 74F11
MD5 checksum: 8A235EDFEF53B25465ECD2D650A4EFC0
PDF: Fairchild 74F113 Dual JK Flip-Flop Datasheet PDF

About this manual

This document is a technical datasheet for the Fairchild Semiconductor 74F113, which features individual J, K, Set, and Clock inputs. The device transfers input data to its outputs on the falling edge of the clock pulse and includes asynchronous set functionality.

What's inside

General Description
Logic Symbols Connection Diagram
Truth Table
Absolute Maximum Ratings
DC Electrical Characteristics
AC Electrical Characteristics
Physical Dimensions

Specifications

Supply Voltage Range	+4.5V to +5.5V
Operating Temperature Range (Free Air)	0°C to +70°C

Frequently asked questions

How does the 74F113 transfer data to outputs?

Input data is transferred to the outputs on the falling edge of the clock pulse.

What happens when the asynchronous Set input is LOW?

A LOW input to Sb sets Q to a HIGH level, independent of the clock.

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