AN3430 STM32F2xx low power mode application note, introduces how to use STM32F2xx series products in low power mode, details clock systems, register settings and firmware development methods, in order to optimize energy consumption in low power applications.
This document provides a software and hardware implementation overview for optimizing the low-power modes of the STM32F2xx product family. It details clock systems, register settings, and firmware development methods to minimize energy usage in applications where low power is critical.
The guide covers power consumption factors, internal supply structures, and hardware environment configurations. It also includes specific firmware tips and a practical example of current consumption optimization, making it a comprehensive resource for system designers aiming to extend battery life in embedded applications.
| Operating voltage supply (VDD) | 1.8 V to 3.6 V |
|---|---|
| WLCSP package operating voltage | 1.65 V to 3.6 V |
| Internal digital power | 1.2 V |
| Low-speed internal RC frequency | 32 kHz |
| Low-speed external crystal frequency | 32.768 kHz |
The device requires a 1.8 V to 3.6 V operating voltage supply (VDD), except for the WLCSP package which requires 1.65 V to 3.6 V.
All unused pins must be connected to ground through a 10K pull-down resistor to avoid external disturbance on the I/Os and increase the EMC performance.
If the user wants the voltage regulator to be active, the Vcap_1 and Vcap_2 pins must be connected to GND through 2.2uF ceramic capacitors.