This document describes the concept, causes, and risks of electrostatic discharge (ESD). It also discusses methods for simulating and testing ESD in electronic devices, as well as common ESD protection techniques. Test results are presented for the STM8T142-EVAL evaluation board, using some of the protection methods detailed in this application note.
This document describes Electrostatic Discharge (ESD), its causes, and associated risks to electronic systems. It outlines various ESD simulation models and international standards used for testing and classification.
The note details typical ESD protection techniques, including dielectric overlays, grounding, and the use of specific protection devices. It concludes with test results obtained from the STM8T142-EVAL evaluation board when subjected to ESD events using the methods described.
| MM Capacitor | 200 pF |
|---|---|
| IEC61000-4-2 Resistor (Rp) | 330 Ω |
| IEC61000-4-2 Capacitor (Cp) | 150 pF |
| IEC61000-4-2 Air Discharge Voltage | 15 kV |
| IEC61000-4-2 Contact Discharge Voltage | 8 kV |
ESD immunity is a category of electromagnetic compatibility (EMC) which studies the unintentional generation, propagation and reception of electromagnetic energy with reference to its unwanted effects.
The MM simulates what happens when a machine becomes electrostatically charged and subsequently discharges into an electronic device when it comes in contact with it.