ST AN2984 Application note handbook

This document deals with the effects of SET (single event transient) on the output of the RHFL4913A low-drop linear regulator and introduces some solutions for coping with these effects.


ST AN2984 Application note handbook - cover page
Brand
STMicroelectronics
Document type
Application Note
Language
English
Pages
8
File format
PDF
File size
224 KB
Published
06 August, 2012
Updated
28 September, 2023
MD5 checksum
3C9E073A3DD2EC4955B5420DD23B4879

About this manual

The document addresses the impact of SET phenomena, specifically heavy-ion disturbances, on the output voltage of the RHFL4913A adjustable high-performance positive voltage regulator. It details how these transients can cause excessive current or supply stoppage for approximately one microsecond, potentially affecting sensitive devices like FPGAs.

What's inside

  • Introduction
  • The RHFL4913A Voltage Regulator
  • Internal Block Diagram
  • PCB Layout Considerations
  • Remote Load Operation
  • SET Mitigation Techniques
  • Baseline Bias Configuration
  • Local Feedback Configuration
  • SET Cross-Section vs LET
  • Revision History

Specifications

Input Supply Voltageup to 12 V
Minimum Output Voltage1.22 V
Minimum Input Voltage3 V
Bandgap Reference Voltage1.23 V

Frequently asked questions

What capacitor values are recommended for SET mitigation?

It is advisable to use tantalum input and output capacitors with a minimum of 1 uF, along with decoupling polyester capacitors.

How can short-duration SET pulses be minimized?

Short-duration pulses depend on ESL and stray inductances; they cannot be suppressed by increasing capacitance but require board-level actions like low ESR capacitors.

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