Analog Devices ADuC812 IEEE 1451.2 STIM Implementation Guide

The ADuC812 MicroConverter is an Analog Devices IEEE 1451.2 compatible smart transducer interface


Analog Devices ADuC812 IEEE 1451.2 STIM Implementation Guide - cover page
Brand
Analog Devices
Category
Other Electronics
Document type
Application Note
Language
English
Pages
29
File format
PDF
File size
199 KB
Published
03 August, 2012
Updated
30 September, 2023
Model
ADUC812
MD5 checksum
1CD434420275FB52695F2E74F46DAB07

About this manual

This document outlines how to implement a true minimal IEEE 1451.2 standard interface on the Analog Devices ADuC812 MicroConverter. It details the creation of modular, scalable code for developing a Smart Transducer Interface Module (STIM) that can be modified to meet end-user requirements.

The guide explains the software architecture required to map the IEEE 1451.2 standard blocks onto the hardware features of the ADuC812, including its 8051 compatible MCU, flash memory, ADCs, and SPI port. It provides an overview of the necessary software modules for handling transducer data, status registers, and communication protocols.

What's inside

  • Introduction
  • What is the IEEE 1451.2 Standard?
  • The ADuC812 Hardware Features
  • Software Overview
  • STIM Block Implementation
  • TII Block Implementation
  • TEDS Block Implementation
  • Address and Function Block

Specifications

Program Flash/EE Size8kb
Data Flash/EE Size640 bytes
RAM Size256 bytes
I/O Linesup to 32 programmable I/O lines
ADC Channels8-channel true 12-bit ADC
DAC CountDual DACs

Frequently asked questions

What is the ADuC812 used for in this document?

It is used as an IEEE 1451.2 compatible Smart Transducer Interface Module (STIM).

What is a STIM?

A Smart Transducer Interface Module that ranges in complexity from a single-channel sensor to many channels and communicates via a digital interface.

What is the TII?

The Transducer Independent Interface, which is simply a 10-wire serial I/O bus.

What are the main software modules for the implementation?

The implementation consists of four modules: STIM block, TII block, TEDS block, and Address and Function block.

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