Silicon Anomaly Sheet AD1837 Audio Codec

About this manual

The Silicon Anomaly Sheet for the AD1837 describes specific bugs present in this version of the part, noting that these issues have been fixed in the AD1837A revision. The document focuses on known anomalies related to ADC and DAC operations.

Key sections cover an ADC Phase Shift Bug occurring during data transfers or register programming, a phase shift issue in TDM256 Master Mode where no workaround is possible at the hardware level, and rare write failures for DAC registers. For each identified bug, the text provides specific circuit diagrams or software procedures to ensure proper operation.

What's inside

• ADC Phase Shift Bug
• Workaround for ADC Phase Shift
• 96 kHz Operation Programming
• ADC Power-Down via SPI Register
• TDM256 Master Mode Limitations
• DAC Writes Workaround

Specifications

Frequently asked questions

What is the recommended workaround for the ADC Phase Shift Bug?

Synchronize the rising edge of PD/RST with the appropriate LRCLK or FSTDM signal to ensure updates occur in a safe region.

Can the phase shift error be fixed when operating in TDM256 Master Mode?

No, because the FSTDM signal is generated after reset and cannot be synchronized; reestablishing the phase relationship must be done via software control.

How should registers be programmed during 96 kHz operation to avoid errors?

Programming the IMCLK divider and ADC sample rate registers must occur during the internal reset time.