The paper introduces a chipset to simplify receiver design and puts forth a design example based on GSM but can be extended to many open or closed air interface. Advances in analog converter technology now allow IF sampling which can greatly simplify receiver design. Advances in digital integrated circuits also advance the state of the art in terms of digital tun- ing and filtering. Together these two chips can replace many of the cumbersome stages of a traditional analog receiver with predictable and reliable performance.
The AD6600 is a dual-channel, gain-ranging ADC with RSSI, designed for IF sampling in superheterodyne receivers. It supports up to 20 MSPS sampling and 250 MHz analog input with 60 dB SFDR. The device includes on-chip attenuators, a peak detector, and an 11-bit ADC. It is intended to simplify receiver design by digitizing at the IF stage, reducing analog complexity and improving manufacturability.
The AD6600 uses a phase-compensated attenuator stage and an external LC filter to manage bandwidth and noise. Its RSSI function automatically adjusts attenuation based on signal strength, providing 6 dB of headroom to prevent clipping. The ADC output can be interpreted as a floating-point word for further digital processing.
| Sample Rate | 20 MSPS |
|---|---|
| Attenuation Range | 30 dB |
The AD6600 can sample analog signals up to 250 MHz.
The AD6600 can sample analog signals up to 250 MHz.
The AD6600 achieves 60 dB SFDR and 57 dB SNR with analog inputs up to 300 MHz.
The AD6600 includes an 11-bit ADC.