This document describes a product that integrates a 12-bit dual channel ADC with high sample rates and IF sampling frequencies. It has a high SNR and SFDR. The product has low power consumption and includes an internal voltage reference and sample-and-hold analog input. It has flexible analog input and clock control features. Additionally, it features a quad channel receive signal processor and programmable decimating FIR filters, making it suitable for communication, multimode digital receivers, smart antenna systems, and more.
The AD6652 is a dual 12-bit ADC with sample rates up to 65 MSPS and IF sampling frequencies to 100 MHz. It features an embedded digital AGC and a quad channel receive signal processor (RSP) capable of processing two WCDMA or two GSM/EDGE carriers. The device includes internal voltage references and sample-and-hold analog inputs, supporting differential or single-ended analog input with flexible control for multicarrier and phased array applications.
| ADC Resolution | 12-bit |
|---|---|
| Sample Rate | up to 65 MSPS |
| IF Sampling Frequency | to 100 MHz |
| SNR | 70 dB (to Nyquist) |
| SFDR | 85 dB (to Nyquist) |
| Power-down | <2 mW |
| Package | 196-lead BGA |
It supports multimode digital receivers including GSM, PHS, AMPS, UMTS, WCDMA, CDMA-ONE, IS-95, IS-136, CDMA2000, EDGE, and IMT-2000.
The device is available in a 196-lead BGA package.
Yes, it features an internal voltage reference.