This document is a data sheet for the AMCC NPe405L PowerNP product, describing its features and characteristics.
The document provides technical specifications for the AMCC NPe405L Embedded Processor. It features an IBM PowerPC 405 32-bit RISC processor core capable of operating at frequencies up to 266 MHz, utilizing PC-133 synchronous DRAM interfaces and supporting external peripherals via a dedicated bus.
Key integrated components include two 10/100 Ethernet MACs, an HDLC controller with support for multiple channels, programmable timers, serial ports compatible with the 16550 UART, and an IIC interface. The chip is available in a 23mm, 324-ball enhanced plastic ball grid array (E-PBGA) package.
| Processor Core | IBM PowerPC 405 32-bit RISC processor core |
|---|---|
| Maximum Frequency | Up to 266 MHz |
| DRAM Interface | PC-133 synchronous DRAM (SDRAM) |
| Package Type | 23mm, 324-ball enhanced plastic ball grid array (E-PBGA) |
| Ethernet Support | Two 10/100 Ethernet MACs |
The processor core operates at frequencies up to 266 MHz.
Yes, it supports a 40-bit interface which serves 32 bits of data plus 8 check bits for ECC applications.
It comes in a 23mm, 324-ball enhanced plastic ball grid array (E-PBGA).